1. Field of the Invention
This invention generally relates to system-on-chip (SoC) power management and, more particularly, to a feedback system and method for controlling processor operating frequencies in a SoC.
2. Description of the Related Art
It is a well-known fact that a processor can be driven to function at higher operating frequencies by increasing the dc supply voltage. Table 1 describes some exemplary operating frequencies cross-referenced to supply voltages.
TABLE 1FrequencyCore Voltage800 MHz1.0 V1.0 GHz1.2 V1.2 GHz1.5 V1.4 GHz1.8 V1.6 GHz2.0 V1.8 GHz2.2 V
If a user wants to increase the frequency of operation to achieve higher throughput, they may manually intervene to change the dc voltage by changing the resistor/capacitor/conductor ladder dc supply voltage filter, which involves soldering and de-soldering of these components. Alternately, a potentiometer can be supplied, which can rotated by the user to change the core voltage. These methods are cumbersome and subject to user error.
Some conventional processors provide a mechanism for software (SW) to issue speed up or slow down commands to a programmable engine. Usually this mechanism is driven from a central power management SW driver associated with an operating system. Such mechanisms are based purely on the software and operating system view of workload demand. These mechanisms work well for computing applications where the operating system is charged with scheduling the processor resources and has complete control over what is executing when. However, for applications that are dominated by input/output (IO) processing, where the workload is dependent on a set of external events such as packet arrivals and departures, the operating system and associated device drivers do not have enough pre-knowledge of pending load status. Without such pre-knowledge, the processors must be kept in the fully “on” state in order to react to the worst case loading conditions. Further, there is no mechanism to directly track the actual voltage level supplied to the processor, or the actual operating frequency of the processor.
Some existing systems make use of a micro-controller to manage device level power. As an example, the microcontroller may be primarily responsible for sequencing voltage, frequency, and even transistor bias in order to achieve a particular power performance mix. Commands to such a microcontroller are usually driven from a single device driver under an operating system. As described earlier, the commands are based on the software observed workload.
Dynamic voltage and frequency, scaling (DVFS) permits processor frequency and voltage to be dynamically changed based on the software workload requirements. In some systems, DVFS is controlled by a dedicated side band interface between each software controlled processor and a central power management controller (PMC). Each processor typically has a dedicated set of control registers to which it writes change states. If the processor's OS wants a little bit more or less power, it writes to its corresponding control register using a device driver. In a multi core system using asymmetric multiprocessors there is no single unified device driver, but instead, a set of device drivers for each OS. These device drivers are unaware of each other.
In other prior art, a system level microcontroller may be responsible for system level power management. An example might be a notebook computer containing suspend states. The micro controller may be used to sequence the system back to normal operational state in the event of external stimulus such as an arriving wake up packet at an Ethernet port.
The problem with the above-mentioned systems is that none of them insure that the selected dc voltage level is actually delivered to the processor. Attempting to operate a processor at a higher speed than can be supported by the supply voltage can lead to erratic processing results and potentially damage the hardware.
It would be advantageous if a SoC feedback system existed that directly enabled dc supply voltages changes, monitored the actual dc voltages supplied, and only enabled a processor to operate at frequencies supportable by the actual dc supply levels.